Photonic Integrated Circuit Reliability
Navy SBIR 2018.2 - Topic N182-108
NAVAIR - Ms. Donna Attick - donna.attick@navy.mil
Opens: May 22, 2018 - Closes: June 20, 2018 (8:00 PM ET)

N182-108

TITLE: Photonic Integrated Circuit Reliability

 

TECHNOLOGY AREA(S): Air Platform, Electronics, Ground/Sea Vehicles

ACQUISITION PROGRAM: NAE Chief Technology Office

The technology within this topic is restricted under the International Traffic in Arms Regulation (ITAR), 22 CFR Parts 120-130, which controls the export and import of defense-related material and services, including export of sensitive technical data, or the Export Administration Regulation (EAR), 15 CFR Parts 730-774, which controls dual use items. Offerors must disclose any proposed use of foreign nationals (FNs), their country(ies) of origin, the type of visa or work permit possessed, and the statement of work (SOW) tasks intended for accomplishment by the FN(s) in accordance with section 3.5 of the Announcement. Offerors are advised foreign nationals proposed to perform on this topic may be restricted due to the technical data under US Export Control Laws.

OBJECTIVE: Develop and/or improve methodologies for determining the reliability of Photonic Integrated Circuit (PIC) and Planar Lightguide Circuit (PLC) devices, and identify failure mechanisms, with an emphasis on determining the influence of neighboring intra-chip devices within individual PIC/PLC devices. The methodologies should lead to PIC/PLC reliability prediction models, software, and Highly Acceleration Life Test (HALT) plan creation methods to extrapolate PIC/PLC lifetime for use in military applications.

DESCRIPTION: Photonic Integrated Circuits (PICs) and Planar Lightguide Circuits (PLCs) of continuously increasing complexity are finding application in optical communication and sensor systems. For example, PICs are a key part of high-capacity transceivers and switches for fiber-optic networks, transmitters and receivers for Free space optical communications, hyperspectral imaging devices, light sources for medical diagnostic equipment, atomic clocks, and gyroscopes. The reliability of PIC and PLC devices applicable to Department of Defense (DoD) avionics, sensors, and electronic warfare is largely unknown by the DoD Science & Technology community. Verification and validation of integrated photonic device reliability is paramount to opening the door for technology transition opportunity discussions with programs. Laboratory testing of state-of-the-art indium phosphide and silicon photonic devices under development in the DoD or in commercial-sector production will be performed to gather data for use in creating/designing the reliability prediction models, software, and HALT plans for PICs/PLCs used in the military and commercial sectors. Quanterion Solutions 2015, “Reliability Prediction Models” software only predicts individual photonic device reliability and not the PIC/PLC reliability.

This SBIR topic seeks the creation/design of new models and software to accurately predict the reliability of PIC/PLCs use in military and commercial applications. The models and software should be able to determine the failure rate and activation energy values of the PIC/PLC. The SBIR effort will also create HALT plans for determining the reliability of PIC/PLC as well as their packaging reliability. PICs and PLCs are primarily fabricated using III-V and/or silicon semiconductor material systems. Silicon PLC material systems based on silicon photonics technology can be highly heterogeneous from a materials standpoint as well as from a physics of failure standpoint. Military use of PICs and PLCs requires environmental ruggedness and reliable operation on the order of 100,000 hours mean time between failure or longer. Device operation has to be sustained under extreme conditions, such as high temperature (> 100ºC), low temperature (< -40 ºC), high radiation, vibration, shock, and humidity. This project will evaluate the underlying reliability physics of III-V and silicon-based PIC chips and their corresponding packages to improve our understanding of their failure mechanisms. Representative PICs should be selected and the main degradation modes should be experimentally and theoretically evaluated. Possible degradation modes include semiconductor crystal point defects and dislocations, dielectric and semiconductor optical absorption changes, material transition interface damage and passivation, dopant diffusion, material mechanical stress, metal diffusion, outgassing, solder creep, and intermetallic compound instability. These representative PICs/PLCs should be subjected to HALT experiments to uncover failures, which will then improve our understanding of device failure physics after appropriate analysis. Individual chips, chip-on-carrier (CoC), and fully packaged devices should be considered for HALT plan creation and evaluation. Acceleration factors temperature, electrical bias, optical power, radiation, and mechanical stress should be considered according to MIL-HDBK 217 and MIL-STD-810. Particular emphasis should be placed on understanding the influence of individual PIC/PLC devices on the reliability of their neighboring devices on the same chip (intra-chip device coupling effects on reliability). Possible failure mechanism evaluation tools to be used include X-Ray radiography, Scanning Electron Microscope (SEM), Transmission Electron Microscope (TEM), Optical beam induced current (OBIC), Focused Ion Beam Etching (FIB), Deep-level Transient Spectroscopy (DLTS), and Atomic Force Microscope (AFM) among many others.

The models verified through experimental testing and the improved understanding of PIC/PLC device and package reliability physics will be used to create/design reliability prediction models and software for PICs/PLCs planned for use in military environments. Due to the large variety of PIC/PLC architectures and base materials, both in fabrication and under development, it is possible that several methods will be identified to extrapolate PIC lifetime depending on the device specifics.

PHASE I: Define innovative methods to model and predict PIC/PLC reliability including experimental test plans based on state-of-the-art reliability physics of failure and modeling and simulation analyses to ascertain existing software prediction shortcomings. Develop models and experimental test plans for application to III-V silicon-photonic photonic integrated circuit devices and PLCs. Develop a Phase II plan.

PHASE II: Acquire representative PIC/PLC devices for experimental testing and perform device testing. Develop, demonstrate, and validate the reliability prediction models. Subject PIC and PLC devices to environmental and mechanical test stresses based on modeling and simulation results, reliability engineering principles, and experimental test plans. Perform root cause analyses of device failures to understand PIC and PLC device interactions and reliability prediction interdependencies. Develop, demonstrate, and deliver a PIC/PLC reliability software package for subsequent independent verification and validation.

PHASE III DUAL USE APPLICATIONS: Verify and validate the reliability software package for use by DoD developers and interested commercial applications. The reliability prediction software tool would find application in commercial systems such as fiber optic networks, data centers, and telecommunications.

REFERENCES:

1. MIL-HDBK-217F, “Reliability prediction of electronic equipment”. http://everyspec.com/MIL-HDBK/MIL-HDBK-0200-0299/MIL-HDBK-217F_NOTICE-2_14590/

2. Beranek, M. & Copeland, E. “Accelerating fiber optic and photonic device technology transition via pre-qualification reliability and packaging durability testing”. IEEE Avionics and Vehicle Fiber Optics and Photonics Conference, 2015. http://ieeexplore.ieee.org/document/7356630/

3. MIL-PRF-38534 (latest version), PERFORMANCE SPECIFICATION: HYBRID MICROCIRCUITS, GENERAL SPECIFICATION FOR" (PDF). United States Department of Defense. 13 Sep 2010.  http://everyspec.com/MIL-PRF/MIL-PRF-030000-79999/MIL-PRF-38534H_26144/

4. MIL-STD-810 (latest version), Environmental Engineering Considerations and Laboratory Tests. http://everyspec.com/MIL-STD/MIL-STD-0800-0899/MIL-STD-810G_12306/

5. MIL-STD-883 (latest version), Microcircuits Test Method Standard. http://everyspec.com/MIL-STD/MIL-STD-0800-0899/MIL-STD-883K_CHG-1_55216/

6. Quanterion Solutions 217Plus™:2015 Calculator. https://www.quanterion.com/products-services/tools/217plus/

KEYWORDS: Photonic Integrated Circuits; Reliability; Highly Accelerated Life Testing; Physics of Failure; Activation Energy; Failure Rate

 

** TOPIC NOTICE **

These Navy Topics are part of the overall DoD 2018.2 SBIR BAA. The DoD issued its 2018.2 BAA SBIR pre-release on April 20, 2018, which opens to receive proposals on May 22, 2018, and closes June 20, 2018 at 8:00 PM ET.

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