performance such as channel stacking or log amplifiers [Refs 2, 3]; however, each has advantages and disadvantages. A critical consideration in balancing the design of a remote sensing LIDAR system is the types of errors the system can tolerate. Two such errors that cannot be tolerated are non-linearity in the logarithmic response and/or gain and offset errors between channels. Another consideration is the coupling of the signal. This type of LIDAR system requires single ended DC coupling and additional calibration of the channel responses. Some type of continuous calibration will likely be required to meet the specifications [Ref 4]. The proposer is encouraged to take advantage of the low duty factor of the LIDAR digitization requirement to perform real-time calibration of analog inputs to the ADC.

 

The digitizer must sample at a high rate to achieve high precision timing, but the required analog bandwidth is much lower. The specifications are listed below. The proposer is encouraged to take advantage of the relaxed requirement to meet specifications.

 

In order to meet the requirements for small autonomous operation, near-real-time processing is required to store, process, and optimize the collection of LIDAR data. This processing and storage of the data is separate from the ADC and FPGA controller, but should be integrated in such a way to allow bi-directional flow of data and commands.

 

The performance objectives of the high dynamic range ADC and LIDAR processor are:

1.  Trigger/acquisition rate: 500 Hz

2.  Single shot acquisition duration: 4 micro-seconds

3.  Analog bandwidth: 50 MHz

4.  Coupling: Single Ended DC

5.  Channels: 4

6.  Sample Resolution: 2 nanoseconds

7.  Timing precision/jitter: <20 pico-seconds

8.  Signal-to-noise and distortion ratio (@ 50 MHz): >90 dB

9.  Number of Effective Bits (50 MHz): 17

10.   Total weight including the ADC and processor: Threshold: less than 20 pounds, Objective: less than 10 pounds.

11.   Total volume: Threshold: Equivalent volume to 3U rack mount (5.25” H x 19” W x 19” L), Objective: Equivalent volume to 1U rack mount (1.75” H x 19” W x 19” L)

12.   Total Power: Threshold: less than 200W, Objective: less than 100W

13.   Ruggedize: Withstand the shock, vibration, pressure, temperature, humidity, electrical power conditions, etc. encountered in a system built for airborne use [Ref 5].

14.   Reliability: Mean time between equipment failure = 3000 operating hours.

15.   Full Rate Production Cost: Threshold < $40,000, Objective <$20,000 (based on 1000 units)

 

PHASE I: Determine, design, and demonstrate the feasibility of a viable ADC solution to meet the design requirements above. Identify technological and reliability challenges of the design approach, and propose viable risk mitigation strategies. The Phase I effort will include prototype plans to be developed under Phase II.

 

PHASE II: Design, fabricate, and demonstrate a digitizer and processor control prototype system based on the design from Phase I. Test and fully characterize the system prototype.

 

PHASE III DUAL USE APPLICATIONS: Implement and finalize the design suitable for a pod or small aerial vehicle, and fabricate a ruggedized system solution. Assist in obtaining certification for flight on a NAVAIR R&D aircraft. Transition final system to appropriate platforms.

 

High dynamic range, >14 bits, ADCs at the GS/s 500 MHz bandwidth range have a broad range of applications for remote sensing LIDAR, Radar, Radiometry, etc. Oceanographic bathymetry systems for survey and exploration work, in particular, would benefit greatly from this ADC system solution.

 

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