FireFly™ Based Network Switch
Navy SBIR 2019.2 - Topic N192-105
NAVSEA - Mr. Dean Putnam -
Opens: May 31, 2019 - Closes: July 1, 2019 (8:00 PM ET)


TITLE: FireFly™ Based Network Switch


TECHNOLOGY AREA(S): Battlespace, Electronics, Sensors ACQUISITION PROGRAM: PMS 435, Submarine Electromagnetic Systems

OBJECTIVE: Develop a device that enables the protocol agnostic networking of Field Programmable Gate Arrays (FPGAs) or other processing elements using the Samtec FireFly ™ physical interface.


DESCRIPTION: With the development of the FireFly™ interface, engineering Field Programmable Gate Array (FPGA) solutions have become easier with the avoidance of complex, high-speed printed circuit board (PCB) trace

routes. FireFly™ also enables fast, direct connections into FPGAs from devices that normally could not connect to FPGAs due to PCB space constraints or signal losses from trace lengths. Currently, the FireFly™ interface acts as a point-to-point connection between an FPGA and another device. FireFly™ currently reaches speeds of up to 192 Gigabits per second (Gbps) aggregate.


It is in the interest of the Navy to develop a network for the FireFly™ physical layer. Such a network switch would enable reconfigurable distribution of high-speed data amongst different processors in a similar manner to a VPX backplane. The reconfigurable nature of this solution would allow advancement beyond the static nature of traditional backplanes, which can require board redesign for new configurations.


The development covered under this topic includes engineering an architecture that supports the distribution and handling of high-speed data over FireFly™ including hardware, software, firmware, and an interface control document detailing mechanical, electrical, and control interfaces as required. The final product for the Navy is a VPX switch card. The switch must be capable of handling the same aggregate speed as the FireFly™ physical layer per port for a minimum of 16 ports. The solution should adhere to the 6U OpenVPX form factor, which defines maximum size, weight, power, and cooling per slot (see ANSI/VITA 65-2017). A solution requiring more than one VPX slot is acceptable. At a minimum, the switch must demonstrate internet protocol (IP), PCIe, and Aurora.


The Phase II effort will likely require secure access, and NAVSEA will process the DD254 to support the contractor for personnel and facility certification for secure access. The Phase I effort will not require access to classified information. If need be, data of the same level of complexity as secured data will be provided to support Phase I work.


Work produced in Phase II may become classified. Note: The prospective contractor(s) must be U.S. Owned and Operated with no Foreign Influence as defined by DoD 5220.22-M, National Industrial Security Program Operating Manual, unless acceptable mitigating procedures can and have been be implemented and approved by the Defense Security Service (DSS). The selected contractor and/or subcontractor must be able to acquire and maintain a secret level facility and Personnel Security Clearances, in order to perform on advanced phases of this contract as set forth by DSS and NAVSEA in order to gain access to classified information pertaining to the national defense of the United States and its allies; this will be an inherent requirement. The selected company will be required to safeguard classified material IAW DoD 5220.22-M during the advance phases of this contract.”


PHASE I: Design and simulate a concept for a solution that is feasible with current or near current technology. Include a notional architecture and potential technologies that fit into each part of the architecture. Demonstrate the feasibility of the concept through modeling and simulation. This technology is essential to enable faster and more efficient processing. Develop a Phase II plan. The Phase I Option, if exercised, will include the initial design specifications and capabilities description to build a prototype solution in Phase II.


PHASE II: Develop, fabricate, and deliver one prototype switch. Refine the base design to demonstrate the performance objectives defined in the Description via a benchtop test at a minimum. Provide an interface control document detailing mechanical, electrical, and control interfaces. Prepare a plan to transition the technology to the Navy under Phase III.


It is probable that the work under this effort will be classified under Phase II (see Description section for details).


PHASE III DUAL USE APPLICATIONS: Support the Navy in transitioning the final technology, which is a VPX switch card, for Navy use. Design, manufacture, and assist the Navy in integration efforts.


Parallel computing and processing and the distribution of large amounts of data create common problems across all technology companies today. This technology could be useful in the measurement and automation industry.



1.   Sadrozinski, Hartmut F. –W and Wu, Jinyuan. “Applications of Field-Programmable Gate Arrays in Scientific Research.” Taylor & Francis, 2010.,

2.   “FireFly Application Design Guide.” Samtec. January 2017. brochure.pdf


KEYWORDS: Field Programmable Gate Array; FPGA; Parallel Computing; Network Card; FireFly™; High Speed Network; VPX



Matthew Alberg






Robert Dougenik






These Navy Topics are part of the overall DoD 2019.2 SBIR BAA. The DoD issued its 2019.2 BAA SBIR pre-release on May 2, 2019, which opens to receive proposals on May 31, 2019, and closes July 1, 2019 at 8:00 PM ET.

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