Thermal and Magnetic Packaging for Large Superconducting Systems
Navy SBIR 20.2 - Topic N202-124
Office of Naval Research (ONR) - Ms. Lore-Anne Ponirakis firstname.lastname@example.org
Opens: June 3, 2020 - Closes: July 2, 2020 (12:00 pm ET)
N202-124 TITLE: Thermal and Magnetic Packaging for Large Superconducting Systems
RT&L FOCUS AREA(S): Microelectronics
TECHNOLOGY AREA(S): Information Systems, Sensors, Electronics
OBJECTIVE: Invent and experimentally validate one or more schemes for packaging of Multi-Chip Modules (MCM) that simultaneously satisfies the system needs for volume conservation and for the thermal and magnetic field conditions that allow proper operation of complex superconducting MCM. The approach developed must be inherently notionally scalable to 1,000’s of such MCM modules/“cards” in Phase III, although the work proposed here should start with a proof that a single MCM can be operated as well as a single chip. The packaging design may assume either or both electrically and photonically realized Input/Output cabling between MCM cards and across temperature gradient, but IO work is not included in this topic.
DESCRIPTION: Direct from RF superconducting Radio Frequency (RF) receivers already offer high sensitivity, extreme bandwidth, and outstanding time domain resolution all present in 1 digital data stream. Hence, they are candidates for such ultra-wideband applications as full spectrum situational awareness and cognitively adapting Low Probability of Detection (LPD) communications. However, numerous military applications such as full-spectrum active arrays (ideal for Electronic Support Measures (ESM) and Signal Intelligence (SIGINT)) require more digitizers than offered by today’s limit of 3 Analog to Digital Converters on a single chip. Even larger scaling is required for the exascale computing applications (needed by future commercial data centers, a dual use). Such scaling of the system complexity will likely progress first to circuit board-like MCM and then to card case-like subassemblies. For systems with so many die to be successful, the proper magnetic and thermal environment must be simultaneously provided to each individual die, as well as including ways to plumb in power lines and data cables without causing stray magnetic fields or difficulties in servicing the final assembly.
Conductive cooling via thermal busses is a well-demonstrated technique in spacecraft design, but demonstrations of its successful use for multiple MCM constructed of 4K niobium circuits are missing. Proper electrical functionality requires no larger than 100mK variation in the effective electronic temperature across the multi-MCM assembly at a mean temperature of around 4.5K or colder.
Any total local magnetic field present at the functional superconducting switching elements is also potentially deleterious to its proper operation, but practically an upper limit of about 4 micro-Tesla may be sufficient to guarantee proper operation. Locally produced fields associated with magnetic flux trapped in moats, screening currents, circuit bias currents, and power distribution add to the more homogeneous ambient sources such as the earth’s magnetic field. So far low frequency magnetic shielding only from the uniform fields have been seriously addressed and there has been little published about oscillating (AC, e.g., clock) field reduction.
Proposers should in their Phase I proposal clarify what operational functionality their MCMs will exhibit, define a notional program work time line through the end of the base of Phase II, and identify what if any Government assistance with active Nb JJ circuit die and passive MCM design/fabrication and MCM assembly their plans require as Government Furnished Property (GFP). Of the order of 2 active and 2 passive designs sites per Phase may be assumed as acceptable GFP. The SFQ5ee and MCM processes at MIT Lincoln Laboratory are the assumed sources of any new GFP materials. Active die from previous US Government programs may be supplied by the prime or possible subcontractors if the original sponsor approves. Such GFP assistance, if any, would be negotiated following Phase I selection and again following Phase II selection. In addition, how the success of the homogeneous temperature/magnetic field suppression will be experimentally documented should be described in the original Phase I proposal.
PHASE I: Base: Generate the final designs for an individual functional 20x20 mm (or larger) MCM based on either identical or distinct active Nb JJ chips (GFP), vendor-supplied supplementary chips/structures, and passive Si carriers. Either flip the vendor-supplied parts onto the carrier or wire bond them in place. Complete a desired risk reduction test of the packaging concept before the Initial Phase II Proposal is written at the end of the base effort. Perform Thermal/ B (magnetic) field modeling via numerical simulation that may be helpful, but is not required nor sufficient in the absence of experimental validation.
Option: Complete realization of the first functional prototype and begin to iterate the most problematic aspect of the realized packaging design.
PHASE II: Base: Complete a proof-of-concept demonstration. Prove the thermal and magnetic field limits can be met in a packaged single MCM assembly without any need to substantially complicate the wiring of input signal, output data, and power to/from the outside world.
Option: Refine the techniques developed and specialize the choice of chips included in the final demonstration to focus on the class of functionality desired by the transition funding sponsor. Conclude at TRL 4 or higher.
PHASE III DUAL USE APPLICATIONS: Transition the packaging techniques to a Government program and participate in further demonstrations using fully functional chips such as a proven computation accelerator for a multiple Teraflop CPU at a commercial data center or some specifically RF receiver functionality, such as correlation functions, digital beam forming, de-interleaving, or other Digital Signal Processing (DSP) operation.
1. Gupta, D., Filippov, T. V., et al. “Digital channelizing radio frequency receiver.” IEEE Trans. Appl. Supercond., vol. 17, no. 2, pp. 430-437, June 2007. HTTP://www..com/wp-content/uploads/2010/12/Digital-Channelizing-Radio-Frequency-Receiver.pdf
2. Hayakawa, H., Yoshikawa, N., Yorozu, S., and Fujimaki, A. “Superconducting digital electronics.” Proceedings of the IEEE, vol. 92, no. 10, pp. 1549-1563, October 2004. HTTPS://you.redo.nii.ac.jp/?action=repository_action_common_download&item_id=3657&item_no=1&attribute_id=20&file_no=1
3. Holmes, D. S., Kadin, A. M., and Johnson, M. W. "Superconducting Computing in Large-Scale Hybrid Systems." Computer 48.12 (2015): 34-42. https://www.computer.org/csdl/mags/co/2015/12/mco2015120034-abs.HTML
4. Jayaweera, S. K. "Signal Processing for Cognitive Radios." John Wiley Press, 2014, ISBN: 978-1-118-82493-1.- https://www.wiley.com/en-us/Signal+Processing+for+Cognitive+Radios-p-9781118824931
KEYWORDS: Thermal Conductivity, Thermal Boundary Resistance, Passive Magnetic Shielding, Active Magnetic Shielding, Magnetic Flux, Superconducting Flux Trapping
TPOC-1: Deborah VanVechten
TPOC-2: Michael Lovellette